The present invention relates to AC-to-DC converters, and more particularly, to a bridgeless interleaved power factor correction circuit with improved efficiency and simplified structure.
AC-to-DC converters are used to convert an AC input voltage, such as a fully-rectified AC line voltage form a power outlet, to a regulated DC output voltage at a desired output voltage level. To meet regulatory requirements, AC-to-DC converters are designed with power factor correction (PFC) to achieve a high power factor (0.9 or more) while reducing total harmonic distortion (THD). Various topologies have been proposed for AC-to-DC converters incorporating power factor correction (PFC). For example, a conventional boost topology uses a bridge rectifier (also referred to as a diode bridge) to rectify the AC input voltage to DC followed by a boost converter functioning as an active PFC circuit. The boost converter attempts to maintain a constant DC bus voltage on its output while drawing a current that is always in phase with and at the same frequency as the line voltage. However, the diode bridge suffers significant power loss and converters using the boost topology typically have poor power conversion efficiency.
Other PFC topologies have been proposed to improve the power conversion efficiency. For example, bridgeless PFC circuits using active switches in place of the low-side diodes have been proposed to reduce power loss and improve conversion efficiency. Also, interleaved PFC circuits using two or more converters in parallel but operating out of phase have been proposed to distribute the total power over the two converters while obtaining frequency multiplication. Finally, bridgeless interleaved PFC circuits have also been proposed to provide a converter with low loss, high efficiency and low EMI (electromagnetic interference).